SAQP technology solution with the help from Huawei is accelerating China’s high end chip production

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Huawei has already obtained the SAQP technology solution, which is a necessary path to improve yield rates and production capacity which I have known this information as far back as September 2023 after learning SMIC 7nm process of Mate 60 series in the previous month of August 2023. This explains why the Mate 60 series, and subsequent new devices and chips like Ascend, can be supplied on a large scale in a sustained manner.

Huawei’s 5nm process without EUV has a yield of 72.28%, and its hourly output and cost are much better. TSMC believes that the yield of the 5nm process using SAQP technology can only be less than 50% at most, because TSMC’s own 5nm process using SAQP technology has a yield of only 45%, selling those chips expensive.

The TSMC 2nm is also postponed to 2027-28. Just in time with EUV planned for 2026-2027 production with 3nm and 2nm from Huawei, SMIC, after 6nm, 5nm 2024 and 4nm and experimental 3nm 2025 SAQP process on DUV lithography machines.

China has such a large urban cluster and such a large number of hardworking people. This kind of technology blockade prevents so many people from using more convenient and productive technologies.

China quickly solved 5 nanometers, and the blockade of chip design software was also quickly resolved. Energy is actually our advantage. At the algorithm level, some people are also working hard. In this competition between chips and AI, China may not be ahead, but it will not be unable to compete. Enabling more people to use AI more conveniently is the direction.

Comprehensive 5nm and 7nm stacking have reached mass production targets. Flagship and mid-range all use new chips. And 5nm is the main one.

Spin coating technology refers to a new process in the processing of filters, but many people interpret it as “landing technology”. Please note that this is one of the processing technologies.

1st stage, starts with Lithography process, 2nd stage Deposition process, 3rd stage Etching process and 4th Another layer Etching process and final stage that ends with Etching and Cleaning.

Products that suppliers use spin coating processing technology on a large scale should be called “absorption-reflection composite filters”. It has the characteristics of absorption + emission, which is a more accurate name. The purpose is to eliminate ghosting and improve the imaging quality when light enters.

On March 25, Huawei’s Quadruple patterning technology is a process in chip manufacturing, SAQP, which TSMC used to have, but it is no longer used. The recent announcement means that they have already made arrangements in this regard a few years ago. This thing uses DUV to print four times, which can reach a level of about 5nm. The core point is to improve the success rate of the process and reduce related costs. Then, combined with the previously mentioned packaging stacking and liquid cooling technology, the overall high-end chip breakthrough is just around the corner.

The biggest chip making trend:

In terms of stacking technology, 3D NAND continues to move towards high stacking. Last year, all major original manufacturers launched products with more than 200 layers. This year, many have already moved towards 300 layers, which also means that flash memory products with lower cost, larger capacity and faster speed will come one after another.

On November 26, 2021, Huawei filed a core technology patent titled “Method for Preparing Transistors, Chip, and Terminal,” and has chosen to disclose it until recently.

Let me reiterate for you again, Huawei’s patented technology, paired with DUV (Deep Ultraviolet) processing, reportedly costs only half that of TSMC’s EUV (Extreme Ultraviolet) process, and the yield rate for 5nm production is at least 72% or higher.

TSMC’s current 3nm process is merely an improved version of the FinFET (Fin Field-Effect Transistor) process, which raises concerns about its performance and cost, and it cannot be truly considered the next-generation process.

The next-generation process required for 3nm fabrication is the GAA (Gate-All-Around) technology, and Samsung’s LGAA (Lateral Gate-All-Around) is reportedly a full generation behind domestic VGAA (Vertical Gate-All-Around) technology. After expanding the gates via Huawei FET with 7nm.

As of recent, on 12th of April 2024, Huawei reportedly setting up massive chip equipment R&D center in Shanghai that enables the company to build and facilitate it’s own lithography machines for chip making processes in high end at scale in the supply chain without disruptions of gaps with 3nm in research and development ahead of 5nm production for this year. Project 02, a government-backed research program begun as far back as 2008 in mainland China.

Source(s): Huawei files patent for low-tech lithography method that might help it build a 5nm SoC

China to make 5nm chips with SAQP process